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| Intel486™ Processors | ||
| Software-Code Examples | ||
 | Embedded Ultra-Low Power Intel486™ GX Processor BSDL File | |
| Embedded Ultra-Low Power Intel486™ SX Processor BSDL File | |
| Intel486™ SX Processor BSDL File | |
| Intel486™ SL Processor BSDL File | |
| Intel486™ SL Processor BSDL Cell Descriptor File | |
| Intel486™ DX Processor BSDL Model (B-stepping) | |
| Intel486™ DX Processor BSDL Model (C-stepping) | |
| Intel486™ DX Processor BSDL Model (D-stepping) | |
| IntelDX2™ Processor BSDL Model (A-stepping) | |
| IntelDX2™ Processor BSDL Model (B-stepping) | |
| IntelDX2™ Processor BSDL Model (C-stepping) | |
| IntelDX4™ Processor BSDL Model | |
| Software-Demos | ||
| 486XX Stand-alone Demo | |
| Software-Drivers | ||
| APM DOS and WIN3.1 Drivers | |
| Software-Misc. | ||
| PLD Equations: 486-Based EISA Eval Board | |
| Intel386™ Processors | ||
| Software-Code Examples | ||
| Boundary Scan Description Language | |
| Intel386™ EX Processor JTAG Programming of Flash - Code | |
| EV386EX rev2.1 Bios, Example program | |
| Example APM BIOS Code | |
| Intel386™ EXTB Processor BSDL File (3 Volt, PQFP) | |
| Intel386™ EXTB Processor BSDL File (3 Volt, TQFP) | |
| Intel386™ EXTC Processor BSDL File (5 Volt, PQFP) | |
| Intel386™ EXTC Processor BSDL File (5 Volt, TQFP) | |
| Protected mode intialization code example | |
| Software-Drivers | ||
| Intel386™ EX Processor PCMCIA (AP702) Drivers & PDS Files | |
| Software-Executables | ||
| r1.1F Flash Loader SW for EV386EX | |
| EV386EX R1.1 Flash Loader Util. for PC | |
| EV386EX R2.1 Flash Loader Util. for PC | |
| PHOENIX i386 Eval Board BIOS Demo | |
| Software-Firmware | ||
| Annabooks demo BIOS | |
| Datalite Demo for 80386EX | |
| FARMBIOS 80386EX Eval Board BIOS Demo | |
| Fully PC/AT Compatible BIOS for EV386EX | |
| General Software 80386EX DOS/BIOS | |
| Software-Misc. | ||
| AP-609 Spreadsheet, PLD Equations & SIM Files | |
| 80186 | ||
| Software-Code Examples | ||
| [ZIP]Source Code Initialization | |
| 186 Boot Block Flash Source Code | |
| 80186 Family Timer Code for RTC | |
| 80186 ICU Initialization for 2 Cascaded Interrupt Inputs | |
| 80C186 Files for Floppy Disk Controller | |
| Active-low 1-shot Pulse on Timer1 Code | |
| AP-730 Interfacing the 82C59A to Intel 186 Family Appendix A | |
| AP-730 Interfacing the 82C59A to Intel 186 Family Processors Appendix B | |
| AP-731 Understanding the ICU of the 80C186EC/80C APPENDIX A | |
| Generate Square Wave on 186 Timer 1 Output | |
| Initialize the 80C187 Numerics Co-processor | |
| Sample Code to Initialize the DRAM Refresh Unit | |
| Setup DMA: Perform Memory to I/O Space Transfer | |
| Shows Code Necessary to Setup 2 DMA Channels | |
| Trans Func Converts Polar to Cartesian | |
| Software-Executables | ||
| Converts Intel Object Format to Hex Form | |
| Latest Jedecs & RISM for EV80C186EC | |
| RISM Monitor & PLD Eqns for 186 Ev Bd | |
* Legal Information © 1998 Intel Corporation